? semiconductor components industries, llc, 2009 december, 2009 ? rev. 0 1 publication order number: ndf05n50z/d ndf05n50z, ndp05n50z, ndd05n50z n-channel power mosfet 500 v, 1.25 features ? low on resistance ? low gate charge ? 100% avalanche tested ? these devices are pb ? free and are rohs compliant absolute maximum ratings (t c = 25 c unless otherwise noted) rating symbol ndf ndp ndd unit drain ? to ? source voltage v dss 500 v continuous drain current r jc i d 5 (note 1) 5 4.7 a continuous drain current r jc , t a = 100 c i d 3.2 (note 1) 3.2 3 a pulsed drain current, v gs @ 10 v i dm 20 (note 1) 20 19 a power dissipation r jc p d 28 96 83 w gate ? to ? source voltage v gs 30 v single pulse avalanche energy, i d = 5.0 a e as 130 mj esd (hbm) (jesd22 ? a114) v esd 3000 v rms isolation voltage (t = 0.3 sec., r.h. 30%, t a = 25 c) (figure 15) v iso 4500 v peak diode recovery dv/dt 4.5 (note 2) v/ns continuous source current (body diode) i s 5 a maximum temperature for soldering leads, 0.063 (1.6 mm) from case for 10 s package body for 10 s t l t pkg 300 260 c operating junction and storage temperature range t j , t stg ? 55 to 150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. limited by maximum junction temperature 2. i s = 4.4 a, di/dt 100 a/ s, v dd bv dss , t j = +150 c http://onsemi.com see detailed ordering and shipping information in the package dimensions section on p age 6 of this data sheet. marking and ordering information v dss r ds(on) (typ) @ 2.2 a 500 v 1.25 to ? 220fp case 221d style 1 to ? 220ab case 221a style 5 dpak case 369aa style 2 1 2 3 4 ipak case 369d style 2 1 2 3 4 1 2 3 1 2 3 n ? channel g (1) d (2) s (3)
ndf05n50z, ndp05n50z, ndd05n50z http://onsemi.com 2 thermal resistance parameter symbol value unit junction ? to ? case (drain) ndp05n50z ndf05n50z ndd05n50z r jc 1.3 4.4 1.5 c/w junction ? to ? ambient steady state (note 3) ndp05n50z (note 3) ndf05n50z (note 4) ndd05n50z (note 3) ndd05n50z ? 1 r ja 50 50 38 80 3. insertion mounted 4. surface mounted on fr4 board using 1 sq. pad size, (cu area = 1.127 in sq [2 oz] including traces). electrical characteristics (t j = 25 c unless otherwise noted) characteristic symbol test conditions min typ max unit off characteristics drain ? to ? source breakdown voltage bv dss v gs = 0 v, i d = 1 ma 500 v breakdown voltage temperature coefficient bv dss / t j reference to 25 c, i d = 1 ma 0.6 v/ c drain ? to ? source leakage current i dss v ds = 500 v, v gs = 0 v 25 c 1 a 150 c 50 gate ? to ? source forward leakage i gss v gs = 20 v 10 a on characteristics (note 5) static drain ? to ? source on ? resistance r ds(on) v gs = 10 v, i d = 2.2 a 1.25 1.5 gate threshold voltage v gs(th) v ds = v gs , i d = 50 a 3.0 4.5 v forward transconductance g fs v ds = 15 v, i d = 2.5 a 3.5 s dynamic characteristics input capacitance c iss v ds = 25 v, v gs = 0 v, f = 1.0 mhz 530 pf output capacitance c oss 68 reverse transfer capacitance c rss 15 total gate charge q g v dd = 250 v, i d = 5 a, v gs = 10 v 18.5 nc gate ? to ? source charge q gs 4 gate ? to ? drain (?miller?) charge q gd 10 plateau voltage v gp 6.5 v gate resistance r g 4.5 resistive switching characteristics turn ? on delay time t d(on) v dd = 250 v, i d = 5 a, v gs = 10 v, r g = 5 11 ns rise time t r 15 turn ? off delay time t d(off) 24 fall time t f 14 source ? drain diode characteristics (t c = 25 c unless otherwise noted) diode forward voltage v sd i s = 5 a, v gs = 0 v 1.6 v reverse recovery time t rr v gs = 0 v, v dd = 30 v i s = 5 a, di/dt = 100 a/ s 255 ns reverse recovery charge q rr 1.25 c 5. pulse width 380 s, duty cycle 2%.
ndf05n50z, ndp05n50z, ndd05n50z http://onsemi.com 3 typical characteristics 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 v ds , drain ? to ? source voltage (v) i d , drain current (a) figure 1. on ? region characteristics 7.0 v v gs = 8 v to 10 v 6.5 v 6.0 v 5.5 v 5.0 v 0 5 10 15 20 25 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 345678910 v gs , gate ? to ? source voltage (v) i d , drain current (a) figure 2. transfer characteristics v ds = 25 v t j = 150 c t j = ? 55 c t j = 25 c 1.00 1.25 1.50 1.75 2.00 2.25 2.50 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10 v gs , gate ? to ? source voltage (v) r ds(on) , drain ? to ? source resistance ( ) figure 3. on ? region versus gate ? to ? source voltage i d = 2.2 a t j = 25 c 1.000 1.250 1.500 1.750 2.000 2.250 2.500 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v gs = 10 v t j = 25 c i d , drain current (a) figure 4. on ? resistance versus drain current and gate voltage r ds(on) , drain ? to ? source resistance ( ) 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50 2.75 ? 50 ? 25 0 25 50 75 100 125 150 r ds(on) , drain ? to ? source resistance (normalized) i d = 2.2 a v gs = 10 v t j , junction temperature ( c) figure 5. on ? resistance variation with temperature 0.1 1.0 10.0 0 50 100 150 200 250 300 350 400 450 500 v ds , drain ? to ? source voltage (v) i dss , leakage ( a) figure 6. drain ? to ? source leakage current versus voltage t j = 150 c
ndf05n50z, ndp05n50z, ndd05n50z http://onsemi.com 4 typical characteristics 0 100 200 300 400 500 600 700 800 900 1000 1100 1200 0 5 10 15 20 25 30 35 40 45 50 v ds , drain ? to ? source voltage (v) c, capacitance (pf) figure 7. capacitance variation t j = 25 c v gs = 0 v f = 1 mhz c iss c oss c rss 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 12.0 13.0 14.0 15.0 0 2 4 6 8 10 12 14 16 18 20 0 50 100 150 200 250 300 q g , total gate charge (nc) figure 8. gate ? to ? source voltage and drain ? to ? source voltage versus total charge v gs , gate ? to ? source voltage (v) v ds , drain ? to ? source voltage (v) q t q gd q gs v ds = 250 v i d = 5 a t j = 25 c v ds v gs 1.0 10 100 1000 1 10 100 r g , gate resistance ( ) t, time (ns) figure 9. resistive switching time variation versus gate resistance t d(off) t f t r t d(on) v dd = 250 v i d = 5 a v gs = 10 v 0.1 1.0 10 100 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 125 c t j = 150 c 25 c ? 55 c v sd , source ? to ? drain voltage (v) figure 10. diode forward voltage versus current i s , source current (a) 0.01 0.1 1 10 100 0.1 1 10 100 1000 v ds , drain ? to ? source voltage (v) i d , drain current (a) figure 11. maximum rated forward biased safe operating area ndd05n50z r ds(on) limit thermal limit package limit v gs 30 v single pulse t c = 25 c 10 s 100 s 10 ms dc 1 ms
ndf05n50z, ndp05n50z, ndd05n50z http://onsemi.com 5 typical characteristics pulse time (s) 50% (duty cycle) 20% 10% 5.0% 2.0% 1.0% single pulse r(t) (c/w) figure 12. thermal impedance (junction ? to ? case) for ndf05n50z r jc = 4.4 c/w steady state 0.01 0.1 1 10 1e ? 06 1e ? 05 1e ? 04 1e ? 03 1e ? 02 1e ? 01 1e+00 1e+01 1e+02 1e+03 pulse time (s) r(t) (c/w) figure 13. thermal impedance (junction ? to ? case) for ndd05n50z 50% (duty cycle) 20% 10% 5.0% 2.0% 1.0% single pulse r jc = 1.5 c/w steady state 1e ? 06 1e ? 05 1e ? 04 1e ? 03 1e ? 02 1e ? 01 1e+00 1e+01 1e+02 1e+03 0.01 0.1 1 10 pulse time (s) 50% (duty cycle) 20% 10% 5.0% 2.0% 1.0% single pulse r(t) (c/w) figure 14. thermal impedance (junction ? to ? ambient) for ndd05n50z r ja = 38 c/w steady state 1e ? 06 1e ? 05 1e ? 04 1e ? 03 1e ? 02 1e ? 01 1e+00 1e+01 1e+02 1e+0 3 0.01 0.1 1 10 100
ndf05n50z, ndp05n50z, ndd05n50z http://onsemi.com 6 leads heatsink 0.110 min figure 15. mounting position for isolation test measurement made between leads and heatsink with all leads shorted together. ordering information order number package shipping ? ndf05n50zg to ? 220fp (pb ? free) 50 units / rail (in development) ndp05n50zg to ? 220ab (pb ? free) 50 units / rail (in development) ndd05n50z ? 1g ipak (pb ? free) 75 units / rail ndd05n50zt4g dpak (pb ? free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. marking diagrams a = location code y = year ww = work week g = pb ? free package ndf05n50zg or ndp05n50zg ayww gate source drain 1 gate 2 drain 3 source 4 drain yww 5n 50zg 4 drain 2 drain 1 gate 3 source yww 5n 50zg
ndf05n50z, ndp05n50z, ndd05n50z http://onsemi.com 7 package dimensions to ? 220 fullpak case 221d ? 03 issue k style 1: pin 1. gate 2. drain 3. source dim a min max min max millimeters 0.617 0.635 15.67 16.12 inches b 0.392 0.419 9.96 10.63 c 0.177 0.193 4.50 4.90 d 0.024 0.039 0.60 1.00 f 0.116 0.129 2.95 3.28 g 0.100 bsc 2.54 bsc h 0.118 0.135 3.00 3.43 j 0.018 0.025 0.45 0.63 k 0.503 0.541 12.78 13.73 l 0.048 0.058 1.23 1.47 n 0.200 bsc 5.08 bsc q 0.122 0.138 3.10 3.50 r 0.099 0.117 2.51 2.96 s 0.092 0.113 2.34 2.87 u 0.239 0.271 6.06 6.88 seating plane ? t ? u c s j r notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch 3. 221d-01 thru 221d-02 obsolete, new standard 221d-03. ? b ? ? y ? g n d l k h a f q 3 pl 123 m b m 0.25 (0.010) y to ? 220 case 221a ? 09 issue af notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension z defines a zone where all body and lead irregularities are allowed. style 5: pin 1. gate 2. drain 3. source 4. drain dim min max min max millimeters inches a 0.570 0.620 14.48 15.75 b 0.380 0.405 9.66 10.28 c 0.160 0.190 4.07 4.82 d 0.025 0.035 0.64 0.88 f 0.142 0.161 3.61 4.09 g 0.095 0.105 2.42 2.66 h 0.110 0.155 2.80 3.93 j 0.014 0.025 0.36 0.64 k 0.500 0.562 12.70 14.27 l 0.045 0.060 1.15 1.52 n 0.190 0.210 4.83 5.33 q 0.100 0.120 2.54 3.04 r 0.080 0.110 2.04 2.79 s 0.045 0.055 1.15 1.39 t 0.235 0.255 5.97 6.47 u 0.000 0.050 0.00 1.27 v 0.045 --- 1.15 --- z --- 0.080 --- 2.04 b q h z l v g n a k f 123 4 d seating plane ? t ? c s t u r j
ndf05n50z, ndp05n50z, ndd05n50z http://onsemi.com 8 package dimensions dpak case 369aa ? 01 issue a style 2: pin 1. gate 2. drain 3. source 4. drain d a b r v s f l 2 pl m 0.13 (0.005) t e c u j ? t ? seating plane z dim min max min max millimeters inches a 0.235 0.245 5.97 6.22 b 0.250 0.265 6.35 6.73 c 0.086 0.094 2.19 2.38 d 0.025 0.035 0.63 0.89 e 0.018 0.024 0.46 0.61 f 0.030 0.045 0.77 1.14 j 0.018 0.023 0.46 0.58 l 0.090 bsc 2.29 bsc r 0.180 0.215 4.57 5.45 s 0.024 0.040 0.60 1.01 u 0.020 ??? 0.51 ??? v 0.035 0.050 0.89 1.27 z 0.155 ??? 3.93 ??? notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 123 4 h 0.386 0.410 9.80 10.40 h 5.80 0.228 2.58 0.101 1.6 0.063 6.20 0.244 3.0 0.118 6.172 0.243 mm inches scale 3:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* style 2: pin 1. gate 2. drain 3. source 4. drain 123 4 v s a k ? t ? seating plane r b f g d 3 pl m 0.13 (0.005) t c e j h dim min max min max millimeters inches a 0.235 0.245 5.97 6.35 b 0.250 0.265 6.35 6.73 c 0.086 0.094 2.19 2.38 d 0.027 0.035 0.69 0.88 e 0.018 0.023 0.46 0.58 f 0.037 0.045 0.94 1.14 g 0.090 bsc 2.29 bsc h 0.034 0.040 0.87 1.01 j 0.018 0.023 0.46 0.58 k 0.350 0.380 8.89 9.65 r 0.180 0.215 4.45 5.45 s 0.025 0.040 0.63 1.01 v 0.035 0.050 0.89 1.27 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. z z 0.155 ??? 3.93 ??? ipak case 369d ? 01 issue b
ndf05n50z, ndp05n50z, ndd05n50z http://onsemi.com 9 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 ndf05n50z/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
|
